t1170p www.vishay.com vishay semiconductors rev. 1.1, 22-aug-14 1 document number: 84247 for technical questions, contact: optochipsupport@vishay.com this document is subject to change without notice. the products described herein and this document are subject to specific disclaimers, set forth at www.vishay.com/doc?91000 silicon pin photodiode description t1170p is pin photodio de chip with 0.88 mm 2 sensitive area detecting visible and near infrared radiation. anode is the bond pad on top. features ? package type: chip ? package form: single chip ? dimensions (l x w x h in mm): 1.17 x 1.17 x 0.28 ? radiant sensitive area (in mm 2 ): 0.88 ? peak sensitivity wavelength: 920 nm ? high photo sensitivity ? suitable for visible light and near infrared radiation ? fast response times ? angle of half sensitivity: ? = 60 ? material categorization: fo r definitions of compliance please see www.vishay.com/doc?99912 applications ? high speed photo detector general information the datasheet is based on vishay optoel ectronics sample testing under certain predetermined and assumed conditions, and is provided for illustration purpose only. customers are encouraged to perform testing in actual proposed packaged and used conditions. vishay optoelectronics die products are tested us ing vishay optoelectronics base d quality assurance procedures and are manufactured using vishay optoelectronics established pr ocesses. estimates such as th ose described and set forth in this datasheet for semicond uctor die will vary de pending on a number of packaging, hand ling, use, and other factors. therefore sold die may not perform on an equivale nt basis to standard package products. note ? test conditions see table basic characteristics note ? moq: minimum order quantity product summary component i ra (a) ? (deg) 0.5 (nm) t1170p 7 60 600 to 1040 ordering information ordering code packaging remarks package form T1170P-SD-F wafer sawn on foil wi th disco frame moq: 23 500 pcs chip absolute maximum ratings (t amb = 25 c, unless otherwise specified) parameter test condition symbol value unit reverse voltage v r 60 v junction temperature t j 100 c operating temperature range t amb -40 to +100 c storage temperature range t stg1 -40 to +100 c storage temperature range on foil t stg2 -40 to +50 c
t1170p www.vishay.com vishay semiconductors rev. 1.1, 22-aug-14 2 document number: 84247 for technical questions, contact: optochipsupport@vishay.com this document is subject to change without notice. the products described herein and this document are subject to specific disclaimers, set forth at www.vishay.com/doc?91000 notes ? the measurements are based on samples which ar e mounted on to18-header without epoxy coating basic characteristics (t amb = 25 c, unless otherwise specified) fig. 1 - diode capacitance vs. reverse voltage fig. 2 - relative spectral sensitivity vs. wavelength without epoxy coating basic characteristics (t amb = 25 c, unless otherwise specified) parameter test condition symbol min. typ. max. unit breakdown voltage i r = 100 a, e = 0 v (br) 60 v reverse dark current v r = 10 v, e = 0 i ro < 1 3 na diode capacitance v r = 0 v, f = 1 mhz, e = 0 c d 12 pf v r = 3 v, f = 1 mhz, e = 0 c d 4pf reverse light current e e = 1 mw/cm 2 , = 950 nm, v r = 5 v i ra 7a angle of half sensitivity ? 60 deg wavelength of peak sensitivity p 920 nm range of spectral bandwidth 0.5 600 to 1040 nm rise time v r = 10 v, r l = 1 k , = 830 nm t r 100 ns fall time v r = 10 v, r l = 1 k , = 830 nm t f 100 ns 0 2.0 4.0 6.0 8.0 10.0 12.0 0.1 1 10 100 c p - capacitance (pf) v r - rever s e voltage (v) f = 1 mhz 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 1.1 400 500 600 700 800 900 1000 1100 s ( ) rel - relative s pectral s en s itivity - wavelength (nm)
t1170p www.vishay.com vishay semiconductors rev. 1.1, 22-aug-14 3 document number: 84247 for technical questions, contact: optochipsupport@vishay.com this document is subject to change without notice. the products described herein and this document are subject to specific disclaimers, set forth at www.vishay.com/doc?91000 dimensions in millimeters mechanical dimensions parameter symbol min. typ. max. unit length of chip edge (x-direction) l x 1.17 mm length of chip ed ge (y-direction) l y 1.17 mm sensitive area a s 0.88 mm 2 wafer diameter d 100 mm die height h 0.265 0.28 0.295 mm bond pad anode 0.1 x 0.1 mm 2 a ( 200:1 ) a orientation of wafer flat technical drawings according to din specification. dimensions in mm not indicated tolerances 0.005 opt. sensitive area: 0.88 mm2 bonding area: 100 m x 100 m bonding restricted to this area in order to avoid damage of adjacent structures thickness: 280 m 15 m drawing-no.: 9.000-5134.01-4 issue: 1; 25.04.2014 *only for information: dimension of sawn die under consideration of 30 m saw kerf 0.9 0 . 1 6 5 1.17 *( ) 0 . 9 1 . 1 7 * ( ) 0 . 1 0 . 1 2 0.1 0.12 bonding area metallization 1 1
t1170p www.vishay.com vishay semiconductors rev. 1.1, 22-aug-14 4 document number: 84247 for technical questions, contact: optochipsupport@vishay.com this document is subject to change without notice. the products described herein and this document are subject to specific disclaimers, set forth at www.vishay.com/doc?91000 note ? all chips are checked in accordance with the vishay semiconductor, specification of visual inspection fvov6870. the visual inspection shall be made in accordance with the specification of visual inspection as referenced. the visual inspe ction of chip backside is performed wi th stereo microscope with incident light and 40x to 80x magnification. the quality inspection (final visual inspection) is performed by production. an addition al visual inspection step as special re lease procedure by qm is not installed. handling and storage conditions ? the hermetically sealed shipment lots shall be opened in temperature and moistu re controlled cleanroom environment only. it is mandatory to follow the rules for disposition of ma terial that can be hazardous for humans and environment. ? product must be handled only at esd safe workstations. standard esd precaution s and safe work environments are as defined in mil-hdbk-263. ? singulated die are not to be handled with tweezers. a vacuum wand with non metallic esd pro tected tip shou ld be used. packing chips are fixed on adhesive foil. upon re quest the foils can be mounted on plastic frame or disco frame. for shipment, the wafers are arranged to stacks and hermeti cally sealed in plastic bags to ensure protection against environmental influence (humidity and contamination). use for recycling reliable operator s only. we can help getting in touch with your nearest sales office. by agreement we will ta ke back packing material, if it is sorted. you will have to bear the costs of transport. we will invoice you for any costs incurre d for packing material that is returned unsorted or which we are not obliged to accept. additional information frontside metallization, anode al backside metallization, cathode niv-ag dicing sawing die bonding technology epoxy bonding
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